RESUME

Current Job Profile

  • Assistant Professor at Florida Atlantic University                                                                                             (2006- Current)

  • Co-PI of Research Projects at FAU

    • One Pass to Production - Funded by Motorola

      funding Amount - $250/year

    • Highly Scalable multiplier - funded by fAU

      Funding amount - $15/year

  • Represents editorial board for

    • associate editor of international journal of modeling and simulation - actaPress

    • International Journal of computer science and engineering

    • international journal of  computer, information and system science and engineering

    • international journal electronics, circuits and systems

    • international journal of computer system science and engineering

  • reviewer of journal

    • international journal of modeling and simulation

    • scientific international journal of engineering, computing and architectures

previous Job Profile

  • Instructor at FAU                                                                                                                                                              (July 2004- Dec 2006)

    • Taught following courses at FAU

      • Introduction to VLSI design

      • introduction to logic design

      • vLSI synthesis and simulation

      • structural digital design

      • design and analysis of algorithms

      • computer operating systems

      • introduction to microprocessor based systems

      • foundations of computer science

      • introduction to internet computing

      • computer organization

      • applied operating systems

    • introduced one new course in the dept

    • prepared dual enrollment proposal for high school students

    • visits to community college high school students

    • meeting with community college advisors for increased cooperating between FAU and community colleges

    • Advising load: advisor for computer science and bachelor of information engineering technology

  • Research assistant and teaching assistant

    Computer science and engineering department at Florida Atlantic University             (Jan 2002 - March 2004)

  • Motorola Plantation, Florida

    Developing perl scripts for host to DSP communications for Mobile Phone                  (2001-2002)

research interests

  • network on chip architecture

  • software-hardware co-design

  • system modeling and integration

  • embedded system design

  • FPGA design

education

  • Ph.D. in Computer Engineering at FAU (Aug 2003- Nov 2006)dissertation topic: QoS driven design of NOC for embedded systems

  • Advanced post graduate diploma in embedded systems                                                            (April 2004 - Aug 2004)

    • microcontroller programming for embedded systems

    • real time operating systems (VxWorks)

    • design of embedded systems with UML

  • Post Graduate Diploma in VLSI CAD tools   (Apr 2004-Aug 2004)training on mentor graphics and xilinx tools

    Front End

    • ModelSim for Mixed Simulation

    • Synthesis with Leonardo Spectrum

    • Static Timing Analysis with SST Velocity

    • Xilinx FPGA Architecture

    • FPGA Design with Xilinx ISE

    • Verification with VN Navigator

    • Hardware Software CoVerification with Seamless

    • DFT Advisor, MBIST and Fast Scan

    Backend and ASIC Flow

    • Layout Design with IC Station

    • Layout Simulation with ELDO

    • parasitic Extraction with Calibre

  • MS in Computer Engineering, Florida atlantic university, Florida, USA                     (Aug 2001 - April 2003)

    Thesis: Low Power CMOS Design of ALU

  • BS in Electrical Engineering, India                                                                                                               (Aug 1996 - June 2000)

funding

  • Equipment grant from Xilinx

    $45,000 -Year 2004

  • Equipment grant for VLSI software from Mentor Graphics

    $30,000 -Year 2004

  • Equipment grant from Xilinx

    $30,000 -Year 2005

publication

  • Refereed Journal Publications

  1. “Biometrics for Person Authentication: A Survey” Ankur Agarwal, A. S. Pandya, Young-Uhg Lho and Kwang-Baek Kim, Journal of Korea Intelligent Information System Society, Vol. 11, No.1, pp.1~15, Jun. 2005.

  2. “A Concurrency Model for Network on Chip Design Methodology”, Ankur Agarwal, Ravi Shankar, International Journal of Modeling and Simulation (Accepted)

  3. “A Deadlock Free Router Design for Network on Chip Architecture”, Ankur Agarwal, Mehmet Mustafa, Ravi Shankar, A.S. Pandya, Y. Lho, Journal of Korea Institute of Maritime Information and Communication Sciences, Vol. 11, No. 4, pp. 696 - 706, April 2007

  4. “NoC Modeling in a System Level Modeling Environment: MLDesigner”, Ankur Agarwal, Ravi Shankar, Cyril Iskander, Scientific International Journal of Engineering Computing and Architectures, (Accepted)

  5. “Survey of NoC architectures and Contributions”, Ankur Agarwal, Ravi Shankar, Cyril Iskander, Scientific International Journal of Engineering Computing and Architectures, (Accepted)

  6. “NOC Architecture Design Methodology”, Ankur Agarwal, A. S. Pandya, YoungUhg Lho, Journal of Korea Institute of Maritime Information and Communication Sciences, Vol.1, pp. 57-64, August 2006

  7. “A Novel Low Power Design of an ALU Using AdHoc Techniques”, Ankur Agarwal, A. S. Pandya, YoungUhg Lho, International Journal of Fuzzy Logic and Intelligent Systems, Vol.5, No.2 , pp.102~017, Jun. 2005.107

  8. “Low Power Design of the Neuroprocessor”, A. S. Pandya, Ankur Agarwal and G. Y. Chae, International Journal of Fuzzy Logic and Intelligent Systems, Vol.4, No.1, pp. 79-83, June, 2004.

  9. “High Frequency Low Power Data Transfer for a RISC and CISC Processor Using AdHoc Techniques”, Ankur Agarwal, A. S. Pandya, YoungUhg Lho, The International Journal of the Korean Institute of Maritime Information and Communication Sciences, Vol.10, No.2, pp. 321-327, Aug. 2006

  10. “Software Complexity and Management for Real-Time-Systems”, Ankur Agarwal, A. S. Pandya, YoungUgh Lho, International Journal of KIMICS, Vol. 4, No. 1, pp. 23-27, March 2006

  • Refereed Book Chapter Publications

  1. “Embedding Intelligence into EDA Tools to Meet the Future Technology Trends”, Ankur Agarwal, Ravi Shankar, A.S. Pandya, Integrated Intelligent Systems for Engineering Design, Edited by Dr Xuan F Zha, National Institute of Standards and Technology, USA & Dr R. J. Howlett, University of Brighton, UK
     

  2. “Low Power design of a Neuroprocessor”, A S Pandya, Ankur Agarwal and P K Kim, Knowledge-Based intelligent Information and Engineering Systems, Eds. V. Palade, R.J. Howlett and L. Jain, Springer, Berlin, Vol.2 pp 856-862, 2003.

  • Refereed Conference Publications

  1. “A Concurrency Model for NOC Design Methodology”, Ankur Agarwal, Ravi Shankar, IEEE Conference of High Performance Computing, Massachusetts Institute of Technology, September 2006
     

  2. “Annotation methods for Embedded Systems”, Ankur Agarwal, Ravi Shankar, Hari Kalva, Ankit Jain, IEEE International Conference on Portable Information Device, Orlando, FL April 2007.
     

  3. “An Integrated Methodology for QoS Driven Component Design and Component Selection” Ankur Agarwal, Georgiana Hamza-Lup, Ravi Shankar, 1st Annual IEEE Systems Conference, Hawaii April 2007
     

  4. “Modeling Concurrency on NOC Architecture with Symbolic language: FSP”, Ankur Agarwal, Ravi Shankar, Fabiano Kovalski, IEEE International Conference on Symbolic Methods and Applications to Circuit Design, Oct 2006
     

  5. “NOC Model in a System Level Modeling Environment: MLDesigner”, Ankur Agarwal, Fabiano Kovalski, Ravi Shankar, Cyril Iskander, 5th IEEE International NEWCAS Conference in Montreal, Canada, August 2007
     

  6. “Quality of Service Driven Communication Backbone Design for Network on Chip Architecture Design Methodology”, Ankur Agarwal, Mehmet Mustafa, Ravi Shankar, IEEE conference on Electrical and Computer Engineering, Canada,  May 2006
     

  7. “A Layered Architecture For NOC Design Methodology”, Ankur Agarwal, Ravi Shankar, A. S. Pandya, “International Conference on Parallel and distributed Computing and Systems", November 2005.
     

  8. “Embedded Systems Power Management”, Ankur Agarwal, Saeed Rajput, A. S. Pandya, “IEEE conference on Electrical and Computer Engineering, May 2006

  9. “Low Power Design of an ALU using Ad Hoc Techniques”, Ankur Agarwal, A. S. Pandya, Andres Folleco, CCCT, Orlando, 2004

  10. “Low Power VLSI Implementation of a Neuroprocessor”, Ankur Agarwal, A.S. Pandya, Young Lho, International Conference on Knowledge Based Systems, Jun 2004

  • Technical Reports

  1. “Cost Feasibility Analysis for Future Embedded Systems with OPP Design Methodologies” Ankur Agarwal, Ravi Shankar, Twenty Page Technology Report to FAU for Motorola, Plantation, 2006
     

  2. “Concurrency Modeling for NOC SubSystem”, Ankur Agarwal, Ravi Shankar, Twenty two pages Technology Report to FAU for Motorola Plantation, 2006
     

  3. “A Detailed Survey of NOC Implementations and OPP-NOC Implementation for Embedded Systems” Ankur Agarwal, Cyril Iskander, Fabiano Kovalski, Ravi Shankar, A Hundred and ten pages Technology Report to FAU for Motorola, plantation, 2005.

technical skills

  • computer languages -

    C, C++

  • scripting languages

    Perl, XML, JavaScript, XHTML

  • operating systems

    Windows, Sun Solaris

  • assembly languages

    8085, 8086, 8051, 68000

  • hardware description languages

    Verilog, VHDL, SystemC, HandelC, ImpulseC

  • hardware tools

    ModelSim, Leonardo Spectrum, FPGA Advantage, Xilinx ISE, VN Navigator, IC Station, DFT Advisor, Fast Scan MBIST, Caliber, Ambit, SST Velocity, PSPICE,, WinSpcie, Silose, LASI

  • system Modeling languages

    ImpuseC, handelC, UML, PtolemyC, SystemC