International Technology Roadmap for Semiconductor
System Level Modeling Environment : MLDesigner
C-Based FPGA Design : ImpulseC
Concurrency Modeling : FSP & LTSA
UML Modeling : Rhapsody
Hardware Software Co-design Language : SystemC
Open Core Protocol
Student Layout Modeling Environment : LASI
SPICE Simulations Environment : Winspice
HDL Simulation : ModelSim
Synthesis Environment : Leonardo Spectrum
ADLEC Verilog Tutorial
Dr. Ankur Agarwal
Contact Information: FAU, Computer Science and Engineering 500 N.W. California Blvd. - CO 121 Port St. Lucie, Florida 34986 Tel: (772) 873-3319, Fax: (772) 873-3388 ankur@cse.fau.edu
